Signal Integrity problems

The JTAG signals in your circuit are typically operated at 10 MHz or more, and they can be susceptible to noise or problems due to lack of termination.

Signals with poor or no termination can cause spurious bit errors or additional clock edges, leading to data corruption or unexpected "broken chain" error messages or may prevent the JTAG chain operating at all. In these cases the JTAG Chain Debugger may report more than the true number of devices in the chain, or frequently fail to read the correct ID codes of the devices in the chain.

Often these problems can be worked around by limiting the clock speed or adjusting the drive characteristics of the XJLink, but even where that is the case it would be better to tackle the source of the problem as there may be variance between PCBs or cables, causing unreliability problems at production time.

Due to the way the JTAG protocol operates, problems are frequently due to termination issues on the TCK signal or due to cross-talk between TDO and TCK, although noise can also be picked up from other sources, and issues are also frequently caused by poor ground connections.

Diagnosing signal integrity problems

It may not be very apparent that you have signal integrity problems - spurious bit errors may only be noticeable when they affect the signal which you are reading rather than any of the others on the board, for example. For this reason the JTAG Chain Debugger has Signal Integrity testing functionality, which you can run for a period of time to verify that your JTAG chain has no errors.

Improving signal integrity

Termination

We recommend that you terminate the TCK signal close to the last device in the JTAG chain, and also recommend placing a 22R resistor close to and in series with the TDO output of the final device in the chain. See the XJTAG DFT guidelines on our website for more details, or contact XJTAG if you feel your situation is not covered by them.

Wiring

When connecting the XJLink to the device under test:

• Use ribbon cables rather than flying wires to reduce the size of potential antenna loops.
• Keep wire lengths down - the closer the XJLink can be to the target hardware the faster the chain is likely to run.
• Avoid TCK next to TDO in cables - place a Ground signal between them if possible.
• Connect as many Ground pins as possible. Try to use all of the even-numbered pins on the XJLink as these have better ground return. Using even numbered pins also means there is a ground pin between each odd-numbered pin signals in the ribbon cable.
• Make sure at least 1 ground connection is made to each TAP connection on the DUT to allow return current to closely follow the path taken by the signal.
• If more than 10 pins are used on the XJLink connector you can use the 20-way to 2 x 20-way splitter board provided with new XJTAG kits to insert ground cores between signal cores on a ribbon cable whilst still maintaining the number of available signal cores.

The above advice applies to using a flying lead to connect to the board under test, or when wiring a test fixture.

Again, we strongly recommend reading the XJTAG DFT guidelines on our website for more details, and if you are unsure how this applies to you, we can give you more advice if you contact us.