Verification and Debugging of Chain Integrity

XJAnalyser is a useful tool for both checking chain integrity and debugging problems which other tools are having when accessing the JTAG chain. It can be used to prove which pin is causing the chain to break, or to verify that the chain can be run continuously for significant periods of time without data errors.

Connecting to hardware with XJAnalyser

Before XJAnalyser can attempt a JTAG connection to the target the Pin Mapping must be correctly defined, and the target should be powered. If the XJLink is used to power the target then XJAnalyser will turn the power on before the first access.

When XJAnalyser first attempts a JTAG connection to a target, it performs the following steps:

• Check the JTAG chain is intact - The first JTAG test carried out on the chain is a TMS reset: each device should then place its IDCODE register in the scan chain path or, if the device does not include such a register, its BYPASS register. The current contents of the scan chain are then clocked. XJAnalyser uses this scan data to determine the number of devices in the JTAG chain, and the ID codes (where available) of each device.
• Check the instruction code register lengths - Having established that the JTAG chain is intact, XJAnalyser is able to directly determine the length of the instruction register in each JTAG device. This information can then be used to ensure that the appropriate BSDL file is assigned to each device.

If the above steps are all completed successfully, a large amount of target functionality has already been verified and JTAG chain information extracted. From this point, XJAnalyser can run JTAG scans. These may reveal further issues in signal integrity or incorrectly setup pins in the circuit (e.g. reset pins), but XJAnalyser is a capable tool which is well suited to assist you in finding and resolving such issues.