Power Configuration

The XJIO board can be powered in two ways.

USB Power

The XJIO board can be powered from the XJLink through the XJLink interface connector CN1. The ability to use the XJIO board without external power means that your test system will be very portable.

External 12V supply

If the current required by the XJIO board for your test system exceeds the limit available via USB (100mA) you can apply power from a standard 12V supply.

The current consumption of the XJIO board is dependent on the number of I/O pins that are being switched, the rate at which they are being switched, and the electrical characteristics of the I/O of the Unit Under Test (UUT). If the 100mA USB limit is exceeded the XJIO board must be externally powered or the operation of the XJLink will become unreliable.

Both supplies should not be used simultaneously.

Soft Start

The XJIO board has a soft start mechanism which takes 200ms to start up. If the XJIO board is powered with an external supply then this delay is not noticeable. However, it can become an issue if the XJIO board is powered via the XJLink. XJTAG automatically pauses after switching on the external power of an XJLink. However, the XJLink2 also has a soft start mechanism, which means XJTAG's standard delay may not be long enough in this scenario.

Therefore, if the XJIO board is powered via an XJLink2, then a 200ms delay should be inserted into its test reset sequence to ensure that the board is fully powered before the JTAG chain is accessed. The XJDemo board example projects for the XJIO board include such a test reset sequence.

IO bank configuration

To provide maximum flexibility, the I/O voltage of each of the 13 banks of digital I/O pins can be configured to use any user generated level between 1.8V and 3.3V.

Supply selection

To use a voltage level other than 3.3V, the voltage selection link on the appropriate connector needs to be placed between pins 1 and 2 instead of pins 2 and 3. The following table lists the voltage selection connectors for each bank:

Bank	Connector	Voltage selection
1	X1	JP10
2	X2	JP11
3	X3	JP12
4	X4	JP13
5	X5	JP14
6	X6	JP15
7	X7	JP16
8	X8	JP17
9	X9	JP18
10	X10	JP19
11	X11	JP20
12	X12	JP21
13	X13	JP22

Connecting the bank supply

If an alternative I/O voltage is required for a bank then a reference voltage must be supplied on pin 1 of its 20-way connector. This is only a reference voltage used to configure the I/O voltage of the CPLDs on the XJIO board.

ADC and DAC References

Jumpers JP23 to JP25 allow the reference voltages supplied to the ADC and DAC to be modified if required.

JP23 sets the reference voltage for the ADC, and when a link is placed on the jumper the reference is set to 3.3V. If a lower reference is required the link can be removed and an external voltage supplied. The reference voltage on the ADC defines the maximum measurable input and voltage step size per bit. The maximum reference voltage for ADC is 3.3V.

JP24 and JP25 set the voltage reference for the DAC. JP24 sets the reference for DAC channels 0 to 3 and JP25 for channels 4 to 7. The default setup for the DAC uses the VDD input to the DAC as the reference so the jumpers can be left unconnected. The reference voltage on the DAC defines the maximum output and voltage step size per bit. The maximum reference voltage for DAC is 3.3V.

For further information on the operation of the ADC or DAC please refer to the XJIO v2 Board User Guide found in the XJIO Board shared folder (typically \XJIO Board\XJIO Board User Guide V3.pdf).