Pin Mappings

Pin mapping files are defined in two parts: the pin mapping between the JTAG controller and your hardware, and (if necessary) the Test Reset Sequence.

You can then set the TCK frequency and test the pin mapping.

Pin Mapping

This panel allows the XJLink's pins to be configured to suit the circuit under test.

XJTAG has several common connector mappings available as presets, such as the pin mapping for the XJDemo v4 demonstration board. These preset pin mappings can be selected via the Load Preset drop-down control. If you are using an XJLink2, there are additional presets including the default XJTAG pin mapping, and those used by Multi-ICE, ByteBlaster and Xilinx, as well as pre-defined pin mappings for two, three and four chains.

If none of the presets are appropriate for the circuit, the pin mapping can be customised as described here.

Existing pin mapping files can be loaded using the Load Mapping File... button from the file menu.