XJTAG Concepts
There are many concepts which are specific to JTAG testing, and some which are specific to XJTAG in particular. These explanations give background knowledge about what XJTAG tools are doing and how they are designed to operate.
JTAG Concepts
- Boards and Netlists
- BSDL Files
- IEEE JTAG Standards
- JTAG Chains
- JTAG Instructions
- JTAG Test Access Port
- TMS Reset Operation
XJTAG-specific Concepts
- Classifying Nets
- How XJTAG interacts with your hardware
- JTAG Chains in XJTAG
- Pin Mappings
- External Hardware (Non-JTAG Test Equipment)
- Connecting the XJLink to the circuit
- Dynamic Chains
- Scan modes
- Multicore JTAG Devices
- Passive Device Types
- Safe Bitstream
- Constant Pins and Disable Values
- Variants
XJTAG v4.1.100