▶ Introduction
- What is XJTAG?
- Software Components
- ▶ Installation Details
▶ Concepts
- Boards and Netlists
- BSDL Files
- IEEE JTAG standards
- JTAG Chains
- JTAG Instructions
- JTAG Test Access Port
- TMS Reset Operation
- Classifying Nets
- ▶ How XJTAG interacts with your hardware
- ▶ Dynamic Chains
- Scan Modes
- Multicore Devices
- Passive Device Types
- Safe Bitstream
- ▶ Constant Pins and Bus Disable Values
- Variants
▶ Hardware
- XJLink-PF20
- XJLink-PF40
- XJLink2
- XJQuad
- PXI-XJLink2
- XJLink2-3030
- XJLink2-3070
- XJLink2-CFM
- FTDI Devices
- Original XJLink
- ▶ Preset Pin Mappings
- XJDemo Board
- ▶ XJIO board
▶ Licensing
- XJLink based licensing
- Network licensing
- Licensing Errors
- Licence Settings
▶ Tutorials
- ▶ XJDeveloper Tutorial
- ▶ XJRunner Tutorial
- ▶ XJAnalyser Tutorial
- ▶ XJDeveloper tutorial for boards without netlists
▶ XJTAG User Guide
- ▶ Setting Up a Physical JTAG Chain
- ▶ Entering Board Information
- ▶ Connections and Disconnects
- ▶ Power, Ground and Termination Nets
- ▶ Defining JTAG Chains
- ▶ Working with Dynamic Chains
- ▶ Categorising Devices
- ▶ Constant Pins
- ▶ Creating Test Device Files
- ▶ Managing XJEase Library Updates
- ▶ Variants
- ▶ Test Lists and XJRunner Settings
  - ▶ Setting up a Test List
  - ▶ XJRunner Settings
- ▶ Explorer and Viewers
- ▶ Sharing XJTAG Projects
- ▶ Revisions
- ▶ Connection Test Errors
  - Broken Chain Messages
  - Connection Test Error Types
- ▶ Using XJIntegration
▶ XJDeveloper
- XJDeveloper User Interface
- ▶ Screens
  - Start Screen
  - ▶ Boards Screen
  - ▶ Connections Screen
  - Power/Ground Nets Screen
  - ▶ JTAG Chain Screen
  - ▶ Categorise Devices Screen
  - Constant Pins Screen
  - Passive Device Files Screen
  - ▶ Test Device Files Screen
  - ▶ Logic Files Screen
  - ▶ Circuit Code Files Screen
    - Standard Globals
  - ▶ Variants Screen
  - ▶ Test Coverage Screen
  - ▶ Pin Mapping Screen
  - Analyser Screen
  - Debug Connection Test Screen
  - ▶ XJRunner Setup Screen
    - XJRunner Tests
    - Edit Test Group Dialog
    - ▶ Edit Test Function Dialog
    - Add/Edit Condition Dialog
    - Suggested Tests Dialog
    - Variant-Profile Mapping Dialog
    - ▶ XJRunner Test List
    - ▶
      Settings Tabs
  - Run Tests Screen
- ▶ Menus and Toolbar items
  - File Menu
  - Edit Menu
  - View Menu
  - Tools Menu
  - Help Menu
  - Other Menus
  - Toolbar Features
- ▶ Options Dialog
  - ▶ Options
  - Regular Expression Editor
- ▶ Helper Panes
  - Assistant Pane
  - Errors Pane
  - Warnings Pane
  - Uncategorised Devices Pane
  - Notes Pane
  - Breakpoints Pane
  - History Pane
- ▶ Test Code Editor
  - Editor Keystrokes
  - Find and Replace Dialog
- ▶ Explorer
  - Overview
  - Finding Pins, Devices and Nets
  - Explorer Tabs
  - Primary Navigation Panel
  - Logic And Connection Panel
  - Details Panel
  - Graphical Navigation Panel
  - JTAG Access
- Save Project As...
- XJPack Dialog
- Zip Project Dialog
- BSDL Editor
- Connection Test Output Viewer
- Company Part Numbers Translator
- Import SPEA Leonardo Project Dialog
- Project Compatibility Report
- Docking Windows
- ▶ Project Files
  - XJEase modules
- ▶ XJEase Library
  - XJEase Library Browser
  - Updating the XJTAG Library
  - Updated Library Files Dialog
  - Saving Library Files
  - User-Defined Libraries
- ▶ Debugging Tests
  - Breakpoints
  - XJEase Watch Window
  - Call Stack Window
  - ▶ XJEase Waveform View
- ▶ Revisions
  - New Revision Dialog
  - Revise Board Dialog
  - Revision Checklist
  - Revision Source Project View Options
  - Revision Device Matching Algorithm
  - Updating Revised Device References
- ▶
  Circuit Visualisation
  - Viewing Devices
  - Viewing Nets
  - Viewing Pins
▶ XJEase Language
- XJEase Keyword Reference
- ▶ Types, Operators and Expressions
- Comments
- END
- ▶ Flow Control
- ▶ Functions and Program Structure
- ▶
  Built-in functions
- SET statement
- HOLDOFF
- ▶ Default Overrides
  - SET_DEFAULT_OVERRIDE
  - RESET_DEFAULT_OVERRIDE
- ▶ Raw JTAG Access
- ▶ SWD Protocol
- ▶ XJEaseDocs
  - ▶ Function Docs
  - ▶ File Docs
- Deprecated Language Features
- ▶ Warnings
- ▶ Running Functions after Test Functions
  - Post-Function
  - Post-Testing Function
- ▶ Serial Numbers in XJRunner
  - SERIAL_NUMBER
- Accelerating JTAG chain accesses
▶ XJAnalyser
- ▶ Overview
- ▶ XJAnalyser Reference
  - ▶ Project Setup
    - ▶ Power/Pin Mapping and Test Reset Sequence Setup
      - Pin Mapping
      - Test Reset Sequence
    - Device Configuration
  - ▶ Menus and Toolbar Items
    - ▶ File Menu
      - Save Project As...
    - View Menu
    - ▶ Project Menu
      - Setting Chain Frequency
    - Scan Menu
    - ▶ Tools Menu
      - ▶ Options Dialog
        
        Interface Options
        
        Files Options
        
        Colour Options
        
        Test Output Options
    - Help Menu
    - Toolbar Features
    - Set Pin Value Menu
  - ▶ Windows
  - ▶ Dialogs
  - ▶ Explorer
- ▶ JTAG Concepts
  - BSDL Files
  - ▶ Configuration of JTAG Device Modes
    - BYPASS
    - CLAMP
    - EXTEST
    - HIGHZ
    - SAMPLE
  - JTAG Speed Limitations
- ▶ Support
  - ▶ Troubleshooting
▶ XJRunner
- Starting XJRunner
- Login Dialog
- ▶ Options Dialog
- ▶ User Management
  - User Privileges
- ▶ Project Management
  - XJRunner Tests
  - ▶ Settings
    - Test Output
    - Functions
    - ▶ Log File
      - Editing Log Formats
    - Runtime Dialogs
    - Serial Number
    - Fault Dictionary
    - Messages
    - Notes
- ▶ Running Tests
- Menus
- Toolbar
- Command-line Arguments
- XJPack Files
- XJRunner Recorder
- ▶ XJRun command-line runner
▶ XJInvestigator
- Starting XJInvestigator
- Login Dialog
- ▶ XJInvestigator Reference
▶ JTAG Chain Debugger
- ▶ Pin Mappings
- ▶ JTAG Chain Debugger Reference
- ▶ Using the JTAG Chain Debugger
▶ Layout Viewer
- Layers
- Selectors
- Menu Items
- Toolbar Features
- Measure Dialog
- Tracking Dialog
- Edit Image Dialog
- Layout Viewer Options
▶ Schematic Viewer
- ▶ Menus and Toolbar items
- ▶ Tools
- ▶ Search
  - Netlist Search
  - Text Search
▶ Log Files
- XJTAG Log Files
- ▶ Log File Format
- ▶ Log File Viewer
▶ BSDL Library
- BSDL File Library Browser
- Adding files
- Organising files in the library
- BSDL files with custom cell types
- Selecting Files From the BSDL Library
▶ XJEase Library Editor
- XJEase Library Editor
- Starting XJEase Library Editor
- Basic Guide to creating a new XJEase Library
- Updating your XJEase Library
- ▶ User Interface
  - Categories Panel
  - ▶ Files Panel
    - File Operations
    - File Statuses
  - Details Panel
  - ▶ Menus and Toolbar item
- ▶ Importing Files From XJDeveloper Projects
- Building
- Syntax Checking
- Hidden Files
- Library Editor Tips
▶ Common UI Elements
- Netlist Search
- Docking
▶ XJFlash
- Preparing to use XJFlash
- ▶ Configuring XJFlash
- Creating the FPGA image
- Selecting the programming files
- Programming the flash
- Reading back the flash contents
▶ Utilities
- ▶ XJLink Manager
- ▶ XJVersion
  - Checking version numbers
  - Managing File Associations
- XJPack
▶ Troubleshooting
- ▶ Project Setup
  - BSDL Files
  - EDIF Netlist Problems
- ▶ JTAG Chain Bring-up
  - JTAG Chain Errors
  - Compliance Patterns
- ▶ Connection Test Problems
- ▶ XJEase Troubleshooting
- ▶ Signal Integrity
- ▶ Technical Support
▶ XJIntegration (.NET Framework API)
- ▶ XJIntegration API Overview
  - XJAnalyser Integration
  - ▶ XJRunner Integration
    - Getting Started
    - Run Sessions, Logging and Resetting Variables
- Deployment
- Migrating from XJRunnerIntegration.dll to XJIntegration.dll
- ▶ LabVIEW
- Using XJIntegration.dll in a C# project
- Minimum Requirements
- ▶ API Reference
▶ XJAPI Reference
- Deployment
- Interface version
- ▶ Data types
- ▶ Functions
- Example code
- Chain padding in XJTAG
▶ Third Party Integration
- Third Party Integration
- ▶ Seica
  - Running XJTAG Tests From Viva
- ▶ SPEA
  - Running XJTAG Tests From Leonardo
  - Execution of Leonardo ICT Test plan tasks
- ▶ Takaya
- ▶ Keysight i3070
Acknowledgements

JTAG

The JTAG preset pin mapping is only available for FTDI devices and places the JTAG signals on the correct pins within the selected channel.

This preset is not available when using a channel that does not support MPSSE (such as channels C and D on an FT4232H).

Pin	Assignment
First pin in channel	TCK
Second pin in channel	TDI
Third pin in channel	TDO
Fourth pin in channel	TMS
Remaining pins in channel	Input