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XJDemo v4

The XJDemo4 pin mapping is the standard pin mapping for the XJTAG demonstration board XJDemo v4.

  • There is a version of this preset for the XJLink2 family of JTAG controllers and a version for the XJLink-PF series of JTAG controllers.
  • When used in conjunction with an XJLink-PFxx controller it requires the adaptor board supplied by XJTAG to be used.

Note that pins A.19 and B.19 on XJLink-PF series controllers are not connected to the XJDemo v4 board via the supplied adaptor board and should therefore be assigned as Input.

XJDemo v4 Pin number Connector Pin Description XJLink2 Assignment XJLink2 Pin number XJLink-PFxx Assignment XJLink-PFxx Pin number
1 Power On Power On 1 High A.1
2 OSC PIO 2 PIO A.3
3 Chain 1: TDI - JTAG data in TDI 3 TDI A.5
4 GND Soft GND 4 Input A.7
5 Chain 1: TDO - JTAG data out TDO 5 TDO A.9
6 SCL PIO 6 PIO A.11
7 Chain 1: TMS - JTAG mode select TMS 7 TMS A.13
8 SDA PIO 8 PIO A.15
9 Chain 1: TCK - JTAG clock TCK 9 TCK A.17
10 GND Hard GND 10 GND A.2, A.4, A.6, A.8, A.10, A.12, A.14, A.16, A.18, A.20
11 Chain 2: nTRST2 - JTAG reset nTRST2 11 nTRST2 B.1
12 GND Soft GND 12 Input B.3
13 Chain 2: TDI - JTAG data in TDI2 13 TDI2 B.5
14 POT PIO 14 PIO B.7
15 Chain 2: TDO - JTAG data out TDO2 15 TDO2 B.9
16 DAC PIO 16 PIO B.11
17 Chain 2: TMS - JTAG mode select TMS2 17 TMS2 B.13
18 MCU_nRST PIO 18 PIO B.15
19 Chain 2: TCK - JTAG clock TCK2 19 TCK2 B.17
20 GND Hard GND 20 GND B.2, B.4, B.6, B.8, B.10, B.12, B.14, B.16, B.18, B.20

See Also