Preset Pin Mappings
XJTAG's JTAG controllers have configurable output pin mappings. For speed of setup, XJTAG defines a number of standard pin mappings which can be used directly or used as starting points for setting up something more complex:
- 2 chains (applies to XJLink2-series controllers)
- 3 chains (applies to XJLink2-series controllers)
- 4 chains (applies to XJLink2-series controllers)
- Altera ByteBlaster (applies to XJLink2-series controllers)
- ARM Multi-ICE (applies to XJLink2-series controllers)
- XJDemo v4 (applies to all types of XJLink JTAG controller)
- XJTAG (applies to XJLink2-series controllers)
- XJTAG Xilinx 14-pin adapter board (applies to XJLink2-series controllers)
There is an additional pin mapping preset called SAFE (applicable to all types of XJLink JTAG controller) which puts all I/O pins into a high impedance state.
XJTAG v4.1.100