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XJFlash Introduction

XJFlash is an advanced method for programming flash devices, allowing fast and flexible programming through the use of an FPGA on the device under test (DUT). It can also be used with certain SoC devices that contain FPGA logic.

XJFlash offers a very large speed improvement over the typical way of programming a flash chip via boundary scan. Instead of using boundary scan to directly control the nets linking the flash to the FPGA, XJFlash automatically creates a custom FPGA image to implement a flash programmer on the DUT. This allows data to be pipelined from the PC.

With a 20MHz TCK, XJFlash is able to use more than 80% of the JTAG link, meaning the flash can be programmed at speeds up to 16Mbps. Often the speed of the flash is the limiting factor, not the speed of the JTAG link to the PC.

In order to implement a specific programmer for the DUT, XJFlash needs information about the FPGA and flash chips used, and which pins connect the FPGA to the flash.

An XJFlash licence is necessary to create the FPGA image, but the configured test can be run from any XJRunner, allowing large-scale production.

N.B. The evaluation version requires the XJFlash licence for running as well as for generating the project, but projects generated using the fully licensed version can be run by any XJRunner.

The following pages explain how to use the graphical configuration wizard to set up XJFlash:

XJFlash can also read back the contents of a flash device.

Exporting XJFlash tests to XJPack files

When exporting the project to an XJPack file for use with XJRunner, or when zipping up a project, certain XJFlash files need to be included which are not added by default. These are:

  • The automatically generated SVF / STAPL files with names XJFlash_<FlashDeviceRef>_from_<FPGADeviceRef> (typically there is one for each flash to be programmed but in certain configurations there may be a single file.)
  • XJFlashConfig.ini
  • Any auto-generated *.elf files with names like XJFlash_<FlashDeviceRef>_from_<FPGADeviceRef>.elf (for SoC devices like the Xilinx Zynq that include a processor).

Once the project has been exported for the first time, XJDeveloper will remember these files and suggest their inclusion in subsequent export operations.